Energy-Delay Space Analysis for Clocked Storage Elements Under Process Variations
نویسندگان
چکیده
In this paper we present the effect of process variations on the design of clocked storage elements. This work proposes to use the Energy-Delay space analysis for a true representation of the design trade-offs. Consequently, this work also shows a comparison of clocked storage elements under a specific set of system constraints for typical corner design and high yield corner design. Finally, we show that designing for high yield can affect the choice of topology in order to achieve energy efficiency.
منابع مشابه
Energy-Delay Space Exploration of Clocked Storage Elements Using Circuit Sizing
Rapid energy-delay exploration methodology based on circuit sizing as applied to clocked storage elements is presented. Circuit delay and energy are modeled using improved RC delay model of a transistor. The accuracy of the model is increased by using Logical Effort setup accounting for input signal slope and extraction of technology dependent parameters. The minimal energy-delay curve is gener...
متن کاملClocking and clocked storage elements in a multi-gigahertz environment
Clocking considerations and the design of clocked storage elements are discussed in this paper. We present a systematic approach for deriving a clocked storage element suitable for “time borrowing” and absorption of clock uncertainties. We explain how to compare different clocked storage elements with each other, and discuss issues related to power consumption and low-power designs. Finally, re...
متن کاملOptimal Retiming of Multi-Phase, Level-Clocked Circuits
Using level-sensitive latches instead of edge-triggered registers for storage elements in a synchronoussystem can lead to faster and less expensive circuit implementations. This advantage derives froman increased exibility in scheduling the computations performed by the circuit. In edge-clockedcircuits the amount of time available for the computation between two registers is precise...
متن کاملEfficient Delay Characterization Method to Obtain the Output Waveform of Logic Gates Considering Glitches
Accurate delay calculation of circuit gates is very important in timing analysis of digital circuits. Waveform shapes on the input ports of logic gates should be considered, in the characterization phase of delay calculation, to obtain accurate gate delay values. Glitches and their temporal effect on circuit gate delays should be taken into account for this purpose. However, the explosive numbe...
متن کاملClocking and Clocked Storage Elements
Clocking, Synchronous Systems, Asynchronous Systems, Clock Uncertainties, Clocked Storage Elements, Finite-State Machine, Clock Distribution.
متن کامل